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Feat/amd throttle detect#281

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amanusk wants to merge 2 commits into
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feat/amd_throttle_detect
Open

Feat/amd throttle detect#281
amanusk wants to merge 2 commits into
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feat/amd_throttle_detect

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@amanusk amanusk commented Mar 26, 2026

Similarly to Intel, get indication on CPU throttling from MSR

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Pull request overview

Adds AMD throttle detection to FreqSource using an AMD-specific MSR (similar to the existing Intel MSR-based throttle decoding), with accompanying unit tests.

Changes:

  • Add new s_tui.sources.amd_therm module to decode throttling state from AMD PSTATE_CUR_LIMIT (and optionally compare HW vs base frequency).
  • Extend FreqSource to select an MSR throttle backend (intel_msr preferred, otherwise amd_msr) and update labels accordingly.
  • Expand/adjust tests to cover AMD MSR backend behavior and the new backend-selection mechanism.

Reviewed changes

Copilot reviewed 4 out of 4 changed files in this pull request and generated 1 comment.

File Description
s_tui/sources/freq_source.py Adds AMD MSR backend selection and per-core AMD throttle label updates.
s_tui/sources/amd_therm.py Introduces AMD MSR throttle-status decoding and availability detection.
tests/test_freq_source.py Updates existing assertions for new backend flag and adds AMD MSR backend tests.
tests/test_amd_therm.py Adds focused unit tests for AMD throttle decoding/availability.

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Comment on lines +52 to +63
val = read_msr(cpu, PSTATE_CUR_LIMIT)
cur_pstate_limit = val & 0x7
smu_limited = cur_pstate_limit > 0

below_base = False
try:
hw_ps = read_msr(cpu, HW_PSTATE_STATUS)
ps0 = read_msr(cpu, PSTATE_DEF_0)
if ps0 & (1 << 63): # PstateEn
hw_freq = _decode_freq(hw_ps & 0xFF, (hw_ps >> 8) & 0x3F)
base_freq = _decode_freq(ps0 & 0xFF, (ps0 >> 8) & 0x3F)
if smu_limited and hw_freq > 0 and base_freq > 0:
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Copilot AI Mar 26, 2026

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In read_throttle_status(), HW_PSTATE_STATUS and PSTATE_DEF_0 are read even when cur_pstate_limit==0 (smu_limited is False). This adds 2 extra MSR reads per core per update and can cause avoidable PermissionError/EIO noise on systems where only PSTATE_CUR_LIMIT is readable. Consider returning early (or skipping the extra reads) when smu_limited is False, since below_base is only meaningful in that case.

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2 participants