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@arc-research-lab

Customized Computer Architecture Research Center at Brown University

ARC lab is the research lab directed by Prof. Peipei Zhou, Brown University. Our main research focus lies in customized computer architecture.

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  1. Aries Aries Public

    ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)

    C++ 52 8

  2. AGILE AGILE Public

    AGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration (SC25)

    C++ 11 2

  3. CHARM CHARM Public

    CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture

    C++ 162 23

  4. AIM AIM Public

    AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!

    C++ 24 3

  5. SSR SSR Public

    SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)

    C 35 5

  6. SCARIF SCARIF Public

    SCARIF is a tool to estimate the embodied carbon emissions of data center servers with accelerator hardware (GPUs, FPGAs, etc.)

    Python 15 1

Repositories

Showing 10 of 10 repositories
  • SCARIF Public

    SCARIF is a tool to estimate the embodied carbon emissions of data center servers with accelerator hardware (GPUs, FPGAs, etc.)

    arc-research-lab/SCARIF’s past year of commit activity
    Python 15 MIT 1 0 0 Updated Dec 23, 2025
  • DERCA Public

    DERCA is an accelerator tailored for real-time safety critical systems.

    arc-research-lab/DERCA’s past year of commit activity
    C++ 2 MIT 0 1 0 Updated Dec 23, 2025
  • SSR Public

    SSR: Spatial Sequential Hybrid Architecture for Latency Throughput Tradeoff in Transformer Acceleration (Full Paper Accepted in FPGA'24)

    arc-research-lab/SSR’s past year of commit activity
    C 35 5 2 1 Updated Dec 23, 2025
  • CHARM Public

    CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture

    arc-research-lab/CHARM’s past year of commit activity
    C++ 162 MIT 23 3 1 Updated Dec 23, 2025
  • Aries Public

    ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)

    arc-research-lab/Aries’s past year of commit activity
    C++ 52 8 6 1 Updated Dec 16, 2025
  • Vitis-AI Public Forked from Xilinx/Vitis-AI

    The Vitis AI branch with code updated for demo to present on VCK190 board, check the commitment history on the 3.0 branch for more details

    arc-research-lab/Vitis-AI’s past year of commit activity
    Python 0 Apache-2.0 666 0 0 Updated Sep 30, 2025
  • AGILE Public

    AGILE: Lightweight and Efficient Asynchronous GPU-SSD Integration (SC25)

    arc-research-lab/AGILE’s past year of commit activity
    C++ 11 2 3 0 Updated Sep 15, 2025
  • AccelLayer Public

    AccelLayer is an analytical tool based on the CHARM analytical model to analyze the latency of Transformer-based layers, targeting on VCK190 platform.

    arc-research-lab/AccelLayer’s past year of commit activity
    Python 4 1 0 0 Updated Aug 10, 2025
  • AIM Public

    AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper accepted to ICCAD2023)!

    arc-research-lab/AIM’s past year of commit activity
    C++ 24 3 3 0 Updated May 18, 2025
  • GPU-benchmark-for-deep-learning-applications Public
    arc-research-lab/GPU-benchmark-for-deep-learning-applications’s past year of commit activity
    2 0 0 0 Updated Aug 24, 2024

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