Starred repositories
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
BaseJump STL: A Standard Template Library for SystemVerilog
Improved version of the NIST Statistical Test Suite (STS)
List of resources about programming practices for writing safety-critical software.
A quaternion based sensor fusion algorithm that fuses accelerometers and gyroscopes and optionally magnetometers
Communication framework for RTL simulation and emulation.
A low pin count sniffer for ICEStick - targeting TPM chips
Ghidra is a software reverse engineering (SRE) framework
The fuzzer afl++ is afl with community patches, qemu 5.1 upgrade, collision-free coverage, enhanced laf-intel & redqueen, AFLfast++ power schedules, MOpt mutators, unicorn_mode, and a lot more!
A minimal but powerful thread pool in ANSI C
verilator / uvm
Forked from chipsalliance/uvm-verilatorUniversal Verification Methodology (UVM) base libraries, with edits for Verilator
the official Rust and C implementations of the BLAKE3 cryptographic hash function
Clean-code version of the baseflight flight controller firmware
MPU-9250 IMU sampled from an Xmega and displayed on an UART device
Google Chrome, Firefox, and Thunderbird extension that lets you write email in Markdown and render it before sending.
Master SPI Component written in VHDL to control an ADXL345 Accelerometer from a FPGA
Original Apollo 11 Guidance Computer (AGC) source code for the command and lunar modules.
FreeRTOS port for Atmel AVR Xmega CPUs
port.c and portmacro.h for FreeRTOS to run on any AVR XMEGA
FreeRTOS kernel files only, submoduled into https://github.com/FreeRTOS/FreeRTOS and various other repos.
A Neural Network written from scratch to classify images of objects, specifically numbers
TFDS is a collection of datasets ready to use with TensorFlow, Jax, ...
Examples using TensorFlow Lite API to run inference on Coral devices