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emacs-dotfiles Public
My emacs dotfile, inspired by spacemacs.
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riscv-isa-manual Public
Forked from riscv/riscv-isa-manualRISC-V Instruction Set Manual
TeX Creative Commons Attribution 4.0 International UpdatedOct 2, 2024 -
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channel-bench-tools Public
Forked from SEL4PROJ/channel-bench-toolsHTML BSD 2-Clause "Simplified" License UpdatedMar 15, 2024 -
trdb Public
Forked from pulp-platform/trdbRISC-V processor tracing tools and library
C GNU General Public License v3.0 UpdatedMar 10, 2024 -
riscv-cbqri Public
Forked from riscv-non-isa/riscv-cbqriThis repo holds the work area and revisions of a QoS register interface for caches and memory controllers specification. The QoS register interface is a non-ISA specification that supports configur…
Makefile Creative Commons Attribution 4.0 International UpdatedFeb 28, 2024 -
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seL4_libs Public
Forked from seL4/seL4_libsNo-assurance libraries for rapid-prototyping of seL4 apps.
C Other UpdatedFeb 23, 2024 -
seL4_tools Public
Forked from seL4/seL4_toolsBasic tools for building seL4 projects
C Other UpdatedFeb 23, 2024 -
pdf.js Public
Forked from zotero/pdf.jsPDF Reader in JavaScript
JavaScript Apache License 2.0 UpdatedFeb 21, 2024 -
aehneln Public
A RISC-V rv64ima_zicsr_zifencei emulator.
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cryptopals-challenge Public
Some solutions to the cryptopals challenge
Python MIT License UpdatedJan 31, 2024 -
blobby Public
Read and dump git object files (loose and packed)
Python MIT License UpdatedJan 3, 2024 -
riscv-compliance Public
Forked from riscv-non-isa/riscv-arch-testAssembly BSD 3-Clause "New" or "Revised" License UpdatedJun 22, 2023 -
embench-iot Public
Forked from embench/embench-iotThe main Embench repository
C GNU General Public License v3.0 UpdatedJun 15, 2023 -
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verilator Public
Forked from verilator/verilatorVerilator open-source SystemVerilog simulator and lint system
C++ GNU Lesser General Public License v3.0 UpdatedApr 2, 2023 -
verilator-exploration Public
Explore various verilator 5 features.
SystemVerilog MIT License UpdatedApr 1, 2023 -
yosys-f4pga-plugins Public
Forked from chipsalliance/yosys-f4pga-pluginsPlugins for Yosys developed as part of the F4PGA project.
Verilog Apache License 2.0 UpdatedMar 28, 2023 -
riscv-europe-summit-templates Public
Forked from riscv-europe/riscv-europe-summit-templatesRISC-V Summit Europe tempales
TeX UpdatedMar 8, 2023 -
evil-collection Public
Forked from emacs-evil/evil-collectionA set of keybindings for evil-mode
Emacs Lisp GNU General Public License v3.0 UpdatedJan 15, 2023 -
pulp_cluster Public
Forked from pulp-platform/pulp_clusterThe multi-core cluster of a PULP system.
SystemVerilog Other UpdatedJan 6, 2023 -
riscv-gnu-toolchain Public
riscv-gnu-toolchain with PULP specific patches
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riscv-gcc Public
riscv-gcc with PULP specific patches
C GNU General Public License v2.0 UpdatedNov 9, 2022 -
riscv-isa-sim Public
Forked from riscv-software-src/riscv-isa-simSpike, a RISC-V ISA Simulator
C Other UpdatedOct 19, 2022 -
core-v-sw Public
Forked from openhwgroup/core-v-swMain Repo for the OpenHW Group Software Task Group
Eclipse Public License 2.0 UpdatedOct 10, 2022 -
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core-v-mcu Public
Forked from openhwgroup/core-v-mcuThis is the CORE-V MCU project, hosting CORE-V's embedded-class cores.
SystemVerilog Other UpdatedAug 7, 2022 -
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