Stars
Open source FPGA-based NIC and platform for in-network compute
A High-performance Timing Analysis Tool for VLSI Systems
Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated
Regression test suite for Icarus Verilog. (OBSOLETE)
A collection of big designs to run post-synthesis simulations with yosys
include hdlc (miao), 422 grapher, 1553b
Hardware Trojan on a Basis 3 FPGA for Hardware and Embedded Systems Security
Trojan Hardware implemented in the OpenCores Amber ARM Core
HDL project of Matrix Processing Unit for FPGA devices.
This is a Serial Parallel Multiplier coded in Verilog
cuijialang / char_display
Forked from WayneGong/char_display利用modelsi波形来显示字符