Dump a UDB configuration to Verilog and use Yosys to simplify it.
./udb-config-parser/udb-config-parser ./examples/udb-and2.bin > udb-and2.v
yosys -p 'read_verilog udb-and2.v; synth; write_verilog udb-and2-simplified.v'-
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Parse the programmable logic configuration of PSoC devices
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