Skip to content
View changab's full-sized avatar

Organizations

@tianocore

Block or report changab

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

RISC-V Configuration Structure

Python 41 19 Updated Oct 30, 2024

EDK II new feature staging

174 154 Updated Mar 27, 2026

RISC-V Profiles and Platform Specification

Makefile 116 38 Updated Sep 6, 2023

RISC-V Open Source Supervisor Binary Interface

C 1,418 662 Updated Mar 22, 2026

The preliminary 'RISC-V microcontroller profile' specs; for convenience, use markdown.

28 4 Updated Feb 15, 2022

Embedded Base Boot Requirements Specification

PostScript 123 36 Updated Mar 12, 2026