Have 5+years of experiance in FPGA RTL design and verification withe the masters degree in embedded systems from NTU, Singapore.
- Singapore
- http://funrtl.wordpress.com
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puf_rng_64_bit
puf_rng_64_bit PublicThis project implements a 64-bit Ring oscillator based PUF on Arty A7 FPGA
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Implementation-of-DTBDM-Decision-Tree-Based-De-noising-Method-on-MAX-10-Nios-II-Embedded-Evaluation
Implementation-of-DTBDM-Decision-Tree-Based-De-noising-Method-on-MAX-10-Nios-II-Embedded-Evaluation PublicThis project is aimed at implementation of a decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels …
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