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cong2738/readme.md

๋ฐ•ํ˜ธ์œค (Park HoYoun)

์•ˆ๋…•ํ•˜์„ธ์š”! ์ด๋ก ๊ณผ ์‹ค์Šต์„ ๋ชจ๋‘ ๊ฒช์€ ์†์œผ๋กœ ์„ค๊ณ„ํ•˜๋Š” RISC-V ๊ธฐ๋ฐ˜ ์‹œ์Šคํ…œ ๊ฐœ๋ฐœ์ž์ž…๋‹ˆ๋‹ค.

๐ŸŒŸ About Me

๐Ÿซ ๊ฐ•์›๋Œ€ํ•™๊ต ์ „๊ธฐ์ „์ž๊ณตํ•™๊ณผ

๐Ÿ• ์„œ์šธ๊ธฐ์ˆ ๊ต์œก์„ผํ„ฐ Harman Semicon Academy ์ˆ˜๋ฃŒ

๐Ÿ† ๊ฐ•์›๋Œ€ํ•™๊ต IT๋Œ€ํ•™ ์กธ์—…์ž‘ํ’ˆ ๊ฒฝ์ง„๋Œ€ํšŒ ์šฐ์ˆ˜์ƒ ์ˆ˜์ƒ

๐Ÿ“ง Email | cong2738@gmail.com

๐Ÿ› ๏ธ HW Engineer

๐Ÿ’ก ์ €๋Š” RTL Design / Verification์— ๋ถ„์•ผ์— ์—ด์ •์„ ๊ฐ€์ง„ HW ์—”์ง€๋‹ˆ์–ด ๋ฐ•ํ˜ธ์œค ์ž…๋‹ˆ๋‹ค!

  • ํ•˜๋“œ์›จ์–ด ๊ธฐ๋ฐ˜ ๊ณ ์† ์˜์ƒ์ฒ˜๋ฆฌ(ISP)ํ”„๋กœ์ ํŠธ๋ฅผ ์„ค๊ณ„ํ•˜๊ณ  ์ง„ํ–‰ํ•œ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • FPGA ๊ธฐ๋ฐ˜ ๋ฉ€ํ‹ฐ์‚ฌ์ดํด RV32I CPU ๋ฐ SoC ์„ค๊ณ„ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • SPI, I2C, APB ๋ฒ„์Šค ๋“ฑ ๋‹ค์–‘ํ•œ ํ†ต์‹  ๋ชจ๋“ˆ์„ RTL๋กœ ๊ตฌํ˜„ํ•˜๊ณ , SystemVerilog๋กœ ๊ฒ€์ฆ ํ™˜๊ฒฝ์„ ๊ตฌ์ถ•ํ•œ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • Testbench ์ž‘์„ฑ, ํŒŒํ˜• ๋ถ„์„, ๋‹จ์œ„/ํ†ตํ•ฉ ๊ฒ€์ฆ์— ๋Šฅ์ˆ™ํ•˜๋ฉฐ, ๊ตฌ์กฐ์ ์ด๊ณ  ๋ฐ˜๋ณต ๊ฐ€๋Šฅํ•œ ๊ฒ€์ฆ ์‹œ์Šคํ…œ์„ ์„ค๊ณ„ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
  • ๋””์ง€ํ„ธ ํšŒ๋กœ์˜ ํ๋ฆ„๊ณผ ์ œ์–ด ๋กœ์ง์„ ๊นŠ์ด ์žˆ๊ฒŒ ์ดํ•ดํ•˜๊ณ  ์žˆ์œผ๋ฉฐ, ์„ค๊ณ„ โ†’ ์‹œ๋ฎฌ๋ ˆ์ด์…˜ โ†’ ๊ฐœ์„ ์˜ ๊ณผ์ •์„ ์ฒด๊ณ„์ ์œผ๋กœ ์ˆ˜ํ–‰ํ•  ์ˆ˜ ์žˆ์Šต๋‹ˆ๋‹ค.
  • ๋ฌธ์ œ ํ•ด๊ฒฐ ๊ณผ์ •์—์„œ ๋…ผ๋ฆฌ์  ์‚ฌ๊ณ ์™€ ๋””๋ฒ„๊น… ์—ญ๋Ÿ‰, ๊ทธ๋ฆฌ๊ณ  ํ˜‘์—…์„ ์œ„ํ•œ ๋ช…ํ™•ํ•œ ์ปค๋ฎค๋‹ˆ์ผ€์ด์…˜์— ๊ฐ•์ ์„ ๊ฐ€์ง€๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

โœ๏ธ๊ธฐ์ˆ  STACK

Verilog HDL

  • ๋ฉ€ํ‹ฐ์‚ฌ์ดํด RV32I CPU๋ฅผ ์ง์ ‘ ์„ค๊ณ„ํ•˜์—ฌ ์ปดํ“จํ„ฐ ๊ตฌ์กฐ์— ๋Œ€ํ•œ ๋†’์€ ์ดํ•ด๋ฅผ ๋ณด์œ ํ•˜๊ณ ์žˆ์Šต๋‹ˆ๋‹ค.
  • APB(Advanced Peripheral Bus) ๋ฒ„์Šค ์„ค๊ณ„๋ฅผ ๋‹ค๋ค„๋ณธ ๊ฒฝํ—˜์„ ํ†ตํ•ด CPU์™€ ์ฃผ๋ณ€์žฅ์น˜ ๊ฐ„์˜ ์—ฐ๊ฒฐ ํ”„๋กœํ† ์ฝœ๊ณผ ๋™์ž‘ ๋ฐฉ์‹์„ ๊นŠ์ด ์žˆ๊ฒŒ ์ดํ•ดํ•˜๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.
  • AXI Peripheral IP์„ ์ง์ ‘ ๋งŒ๋“ค๊ณ  ๋ธ”๋ก์„ ์„ค๊ณ„ํ•œ ๊ฒ…ํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • UART, SPI, I2C ๋“ฑ ํ†ต์‹  ๋ชจ๋“ˆ์„ ์ง์ ‘ ๊ตฌํ˜„ํ•˜๊ณ , ๊ธฐ๋Šฅ ๋‹จ์œ„ ํ…Œ์ŠคํŠธ๋ฒค์น˜๋ฅผ ํ†ตํ•ด ๋ช…ํ™•ํžˆ ๊ฒ€์ฆํ–ˆ์Šต๋‹ˆ๋‹ค.
  • ํ†ตํ•ฉ ์„ผ์„œ ์‹œ์Šคํ…œ์—์„œ ๊ฐ ์„ผ์„œ ๋ชจ๋“ˆ์„ Verilog๋กœ ๊ตฌํ˜„ํ•˜๊ณ  ์ƒํ˜ธ ์—ฐ๋™์„ ์œ„ํ•œ ๊ตฌ์กฐ์  ์„ค๊ณ„๋ฅผ ์ˆ˜ํ–‰ํ–ˆ์Šต๋‹ˆ๋‹ค.
  • FSM ๊ธฐ๋ฐ˜ ์ œ์–ด ์„ค๊ณ„, ๋ชจ๋“ˆํ™”, ์‹œ๋ฎฌ๋ ˆ์ด์…˜ ํŒŒํ˜• ํ•ด์„ ๋Šฅ๋ ฅ์— ๊ฐ•์ ์„ ๊ฐ€์ง€๊ณ  ์žˆ์Šต๋‹ˆ๋‹ค.

System Verilog & UVM

  • SystemVerilog๋กœ ๋ณต์žกํ•œ ํ…Œ์ŠคํŠธ๋ฒค์น˜ ํ™˜๊ฒฝ์„ ๊ตฌ์ถ•ํ•˜๊ณ , ๋‹ค์–‘ํ•œ ๋ช…๋ น์–ด/๋ชจ๋“ˆ์˜ ๊ฒ€์ฆ์„ ์ˆ˜ํ–‰ํ•œ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • RISC-V APB ์‹œ์Šคํ…œ, SPI/I2C ๋ชจ๋“ˆ, ์˜์ƒ์ฒ˜๋ฆฌ ์‹œ์Šคํ…œ์— ๋Œ€ํ•œ ํ…Œ์ŠคํŠธ ํ™˜๊ฒฝ์„ ์ง์ ‘ ์ž‘์„ฑํ•˜์˜€์Šต๋‹ˆ๋‹ค.
  • I2C ํ†ต์‹  ๋ชจ๋“ˆ์„ ๋Œ€์ƒ์œผ๋กœ UVM(Universal Verification Methodology)์„ ์ ์šฉํ•˜์—ฌ, ๋‹จ์œ„ ๋ชจ๋“ˆ ๋ฐ ์‹œ์Šคํ…œ ํ†ตํ•ฉ ์ˆ˜์ค€์˜ ๊ฒ€์ฆ ํ๋ฆ„ ๊ตฌ์„ฑ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.

Embedded

  • STM32 (Cortex-M4)๋ฅผ ํ™œ์šฉํ•œ ์‹œ์Šคํ…œ ์ œ์–ด ๊ฒฝํ—˜์ด ์žˆ์œผ๋ฉฐ, ์„ผ์„œ ์ œ์–ด, UART/I2C/SPI ํ†ต์‹  ๊ตฌํ˜„ ๋“ฑ์„ ์ง์ ‘ ๊ฐœ๋ฐœํ–ˆ์Šต๋‹ˆ๋‹ค.
  • ์ž„๋ฒ ๋””๋“œ ์‹œ์Šคํ…œ์— RTOS๋ฅผ ์‚ฌ์šฉํ•˜์—ฌ ๋ฉ€ํ‹ฐ์Šค๋ ˆ๋”ฉ ํ™˜๊ฒฝ์—์„œ์˜ ์‹œ์Šคํ…œ ์„ค๊ณ„์™€ ๋””์ž์ธํŒจํ„ด ์ ์šฉํ•œ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.
  • ํ•˜๋“œ์›จ์–ด ์„ค๊ณ„ ์™ธ์—๋„ Python์„ ํ™œ์šฉํ•œ API ๊ธฐ๋ฐ˜ ์–ดํ”Œ๋ฆฌ์ผ€์ด์…˜ ๊ฐœ๋ฐœ ๊ฒฝํ—˜์ด ์žˆ์œผ๋ฉฐ, ์ถœํ‡ด๊ทผ ์•ˆ๋‚ด ๋ณด์กฐ ์‹œ์Šคํ…œ์„ ๊ตฌํ˜„ํ–ˆ์Šต๋‹ˆ๋‹ค.
  • ๋ฐ์ดํ„ฐ์‹œํŠธ ๊ธฐ๋ฐ˜ ์‹œ์Šคํ…œ ์„ค๊ณ„ ๋ฐ ๋กœ์šฐ๋ ˆ๋ฒจ ํ†ต์‹  ๊ตฌํ˜„์— ์ต์ˆ™ํ•ฉ๋‹ˆ๋‹ค.

์˜์ƒ์ฒ˜๋ฆฌ / ์ธํ„ฐ๋ž™์…˜ ์‹œ์Šคํ…œ

  • ๋จธ์‹ ๋Ÿฌ๋‹ ์—†์ด Verilog๋งŒ์œผ๋กœ ์ƒ‰์ƒ ์ถ”์ถœ ๊ธฐ๋ฐ˜ ๋งˆ์ปค ํŠธ๋ž˜ํ‚น ์‹œ์Šคํ…œ์„ ๊ตฌํ˜„ํ–ˆ์Šต๋‹ˆ๋‹ค.
  • FPGA์— ์—ฐ๊ฒฐ๋œ ์นด๋ฉ”๋ผ ๋ฐ์ดํ„ฐ๋ฅผ ์ฒ˜๋ฆฌํ•˜์—ฌ ์ฒญ๊ธฐ๋ฐฑ๊ธฐ ๊ฒŒ์ž„ ๋“ฑ ์ธํ„ฐ๋ž™ํ‹ฐ๋ธŒ ์‹œ์Šคํ…œ์„ ์™„์„ฑํ–ˆ์Šต๋‹ˆ๋‹ค.
  • RGB-HSV ์ƒ‰์ƒ ๊ณต๊ฐ„ ์ฒ˜๋ฆฌ, ๋งˆ์ปค ์œ„์น˜ ์ถ”์ , ์†๋„ ์ถ”์ • ๋“ฑ ๊ฐ„๋‹จํ•œ ๋น„์ „ ๋กœ์ง์„ HDL๋กœ ์ง์ ‘ ๊ตฌํ˜„ํ•œ ๊ฒฝํ—˜์ด ์žˆ์Šต๋‹ˆ๋‹ค.

๐Ÿ“‘Project


Pinned Loading

  1. HandBand HandBand Public

    HandBand : ISP_RTL_Design, Embedded System

    VHDL 4

  2. FlagGame FlagGame Public

    FlagGame : ISP_RTL_Design(HarmanSA_June_TeamPJ)

    SystemVerilog 1 4

  3. my_RISC-V my_RISC-V Public

    RISC-V design to develop

    C 1

  4. May_team_project_I2C_SPI May_team_project_I2C_SPI Public

    UVM based Verification of SPI_Protocol and I2C_Protoccol. A Serial intra System Communication Peripheral Protocol

    VHDL 3

  5. SmartFarmSensorSystem SmartFarmSensorSystem Public

    Smart Farm Sensor System with AMBA APB Interface my RISC-V

    SystemVerilog 1

  6. HARMAN_fpga-VGA HARMAN_fpga-VGA Public

    Tcl