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5 stars written in Verilog
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PicoRV32 - A Size-Optimized RISC-V CPU

Verilog 3,855 885 Updated Jun 27, 2024

opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Verilog 2,458 319 Updated Jul 16, 2025

A Hardware Description Language based on the Rust Programming Language

Verilog 259 22 Updated Dec 23, 2025

A Full Hardware Real-Time Ray-Tracer

Verilog 111 14 Updated Nov 16, 2025

Open Source Bitcoin Vanity Address Generation on FPGAs

Verilog 32 10 Updated Jan 29, 2022