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An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
8051 soft CPU core. 700-lines statements for 111 instructions . Fully synthesizable Verilog-2001 core.
An AXI DDR3 SDRAM controller for FPGA
This repository is used to store RTL code for combining a single video source from multiple video sources.
The system is a FPGA-based system that can recognize object in videos.
This project aims to design a hardware encryption and decryption scheme for the Data Encryption Standard (DES) algorithm