PicoRV32 - A Size-Optimized RISC-V CPU

SERV - The SErial RISC-V CPU

A small, light weight, RISC CPU soft core

Verilog library for ASIC and FPGA designers

MNT VA2000, an Open Source Amiga 2/3/4000 Graphics Card (Zorro II/III), written in Verilog

High performance motor control

RISC-V Formal Verification Framework

VRoom! RISC-V CPU

RIDECORE (RIsc-v Dynamic Execution CORE) is an Out-of-Order RISC-V processor written in Verilog HDL.

A Simple FPGA Core for Creating VGA/DVI/HDMI/OpenLDI Signals

RISC-V Formal Verification Framework

Verilog 2001 implementation of the ChaCha stream cipher.

collaboration on work in progress

RISC-V instruction set CPUs in HardCaml

Quick and dirty Breakout game written in Verilog.