[SWP] Support mixing latency=0 with compiler derived latencies #534
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In an example kernel we saw a regression arise from change to how the SWP schedule is generated in the presence of a jagged tensor bias. Its unclear the exact cause of this change (could have been schedule changes or op backtracking that enabled picking the op), but in either case the ideal solution is to disable SWP for the bias loads.
To do this we want to modify the kernel to set
latency=0, but still derive all other loads in the compiler. This PR does this with the following process:loadOpToIndLevelcalculation if it was annotated. This will both ensure that "distance" calculations omit this load and that the load's latency is not modified.To explain in slightly more detail the issue, the latency that is assigned is based on the longest load path. The jagged tensor being considered made the longest path 2, so now every load pipelined
num_stages / 2. This lead to a regression because the other loads needed more pipelining (and the bias did not need pipelining). By setting the loads on that path to 0 you retain the original schedule where the loads are all pipelined by the full num_stages.