Ternary AI · FPGA · Custom Number Formats · Ko Samui, Thailand 🇹🇭 · Remote worldwide (UTC+7) 📧 admin@t27.ai · 💬 Telegram @t27_dev · 🐦 X @t27_dev · 📞 +66 62 401 4170

I take a novel number format from an arXiv paper to live FPGA hardware (Artix-7) — and make the neural network train itself on the FPGA. Math → formal spec → RTL → FPGA → on-device ML → machine-checked proof. Solo, on a fully open-source flow.

Ternary-AI systems research engineer who specializes in ternary models and owns the whole chain: number-format research, spec-first RTL, FPGA bring-up, on-device ML, and formal verification. I designed GF-T — a ternary-native float format measured to beat comparable ternary formats on benchmarks (≈3–5.5× vs tekum16) — and the broader GoldenFloat φ-derived family (arXiv); built a spec-first compiler (.t27 → Verilog, bit-exact), and proved a neural network that trains itself on a live Artix-7 — using only open-source tools (Yosys / nextpnr / prjxray), no Vivado, no Docker. 10+ years shipping and teaching software (JS school, React Native, AI agents).

Open to: remote hardware-AI · ML-systems · FPGA/RTL roles — full-time or contract.

• Neural net that trains itself on FPGA — on-chip SGD; binary + 3-class classification 100% held-out; 2-layer ReLU solves XOR; every node bit-exact from .t27 spec to FPGA; open-source flow.
• GF-T — my ternary number format, measured against five competitor formats from their specifications — ternary-native GoldenFloat ladder (GF-T8/16/32), measured to beat comparable ternary formats (≈3–5.5× vs tekum16), no regime decode, native ternary exponent.
• GF16 4×4 matmul on FPGA — synthesis figures on file (an earlier 323 MHz timing claim was withdrawn after review), running on hardware.
• Ternary LLM on a $30 FPGA — 63 tok/s @ 1 W (an earlier "0 multipliers" claim was withdrawn after review), open toolchain — DOI 10.5281/zenodo.18947017.
• TinyTapeout SKY130 design — GDS ✅ · gate-level test ✅ · precheck ✅; submissions TTSKY26a (withdrawn and refunded, 6 Aug 2026) and TTSKY26b (withdrawn before fabrication) — no die exists; all hardware results are on the Artix-7 (XC7A200T) FPGA prototype.

• GoldenFloat: A Phi-Derived Static-Split Floating-Point Family from GF4 to GF1024 with a Lucas-Exact Integer Identity — arXiv:2606.05017
• Golden Ruler: A Numeric Format Catalog with Bit-Exact Conformance Vectors for FP8, BF16, MXFP4, and Microscaling Formats — arXiv:2606.09686 (v3, announced 7 Sep 2026)
• Ternary Network Floats — under review, Microprocessors and Microsystems (Elsevier), submitted 3 Sep 2026 — source · artefacts

Zenodo DOIs: GoldenFloat: φ-Optimal Floating-Point Formats for Ternary Computing (T27) · Trinity S³AI Framework — Complete Research Collection v5.0 · Trinity v2.0.2 — FPGA Autoregressive Ternary LLM

• PhD in progress — Golden Chain: Unification of Physical Constants via Golden Ratio (2026–)
• State University of Management, Moscow — Management (2006)
• AWS Community Builders — member

Hardware      Verilog · Yosys · nextpnr · prjxray · openXC7 · openFPGALoader
              iverilog · JTAG/XVC · SKY130 PDK · TinyTapeout · GF16 float
Systems       Rust · Zig · Coq/Rocq · LaTeX · ternary logic · spec→FPGA
              mesh networking · AEAD crypto · compilers
AI / ML       on-device training · quantization · Claude Code · MCP · RAG
              multi-agent orchestration · CPU-optimized inference
Web / Mobile  TypeScript · React Native · React · Node.js · GraphQL · Supabase

_{φ² + φ⁻² = 3 · Building hardware that thinks}