A visual simulator for teaching computer architecture using the RISC-V instruction set

MARIE.js is a simple, yet intuitive MARIE simulator built in JavaScript 📝 and is used for teaching computing architecture and assembly language

RISCV full system support on gem5 related files live here

Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit

StableLM: Stability AI Language Models

Implementation of "BitNet: Scaling 1-bit Transformers for Large Language Models" in pytorch

Official inference framework for 1-bit LLMs

Visual Studio Code

Linux kernel source tree

Documents from a live coding session by Christopher Wolfram related to content from the 2016 film Arrival

This is a special repository for the Tern Systems GitHub Organization. Visible to the public for discussion and collaboration purposes.

RISC-V instruction set simulator built for education

A compiler for ChocoPy, a statically typed dialect of Python.

Go compiler frontend (gccgo)

A simple JSON parser for C++ projects based on C++98

A library to parse C/C++ source as AST

The Fast Lexical Analyzer - scanner generator for lexing in C and C++

RISC-V Assembly Programmer's Manual

Submission template for Tiny Tapeout 03

Radix conversion circuits build with CNTFET. Eg. 4 bit Binary to 4 trit Ternary

An 8-bit SoC for implementation on an iCE40 FPGA.

"DHRYSTONE" Benchmark Program by Reinhold P. Weicker

Raster editor and simulator of logic circuits

This repository provides a Linux kernel bootable on RISC-V boards from SiFive

Make a compiler that supports a subset of the ANSI-C programming language

A storage place for my ternary experiments, including an emulator for a theoretical 27-trit CPU.

Ternary computer emulator