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Starred repositories

4 results for source starred repositories written in VHDL
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Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA

VHDL 210 63 Updated Feb 28, 2019

AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream transmitter and receiver verification components

VHDL 149 25 Updated Mar 16, 2026
VHDL 9 3 Updated Aug 25, 2021

Lazily forking hamsternz fpga ethernet to make it easy to debug downloaded programs. Use with wireshark or ScaPy.

VHDL 1 1 Updated Feb 27, 2022