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Open Claude Is Open-source coding-agent CLI for OpenAI, Gemini, DeepSeek, Ollama, Codex, GitHub Models, and 200+ models via OpenAI-compatible APIs.

TypeScript 10,154 3,673 Updated Apr 3, 2026

systolic_array_processor for CNN, DNN, GEMM (16x16 PE array)

Verilog 7 2 Updated Aug 5, 2024

PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open processes.

Python 408 112 Updated Mar 5, 2026

Linux kernel source tree

C 226,793 61,361 Updated Apr 3, 2026

Support for Rocket Chip on Zynq FPGAs

Tcl 420 194 Updated Jan 29, 2019

educational microarchitectures for risc-v isa

Scala 743 163 Updated Sep 1, 2025

A Heterogeneous GPU Platform for Chipyard SoC

Scala 48 2 Updated Apr 3, 2026

A powerful MCP toolkit for coding, providing semantic retrieval and editing capabilities - the IDE for your agent

Python 22,436 1,501 Updated Apr 3, 2026

一个基于 Python Telegram Bot 的自动化认证工具,能够自动完成 SheerID 平台的学生/教师身份验证流程。

Python 2,739 933 Updated Mar 12, 2026

π RuView: WiFi DensePose turns commodity WiFi signals into real-time human pose estimation, vital sign monitoring, and presence detection — all without a single pixel of video.

Rust 45,490 6,111 Updated Apr 3, 2026

learn docker in your terminal, with bite sized exercises

Shell 880 66 Updated Mar 22, 2026

Common SystemVerilog components

SystemVerilog 727 194 Updated Mar 31, 2026

Training neural networks on Apple Neural Engine via reverse-engineered private APIs

Objective-C 6,548 917 Updated Mar 10, 2026

Verilog UART

Verilog 546 152 Updated Feb 27, 2025

Open Logic FPGA Standard Library

VHDL 908 103 Updated Mar 22, 2026
Python 5 4 Updated Oct 10, 2025

FULL Augment Code, Claude Code, Cluely, CodeBuddy, Comet, Cursor, Devin AI, Junie, Kiro, Leap.new, Lovable, Manus, NotionAI, Orchids.app, Perplexity, Poke, Qoder, Replit, Same.dev, Trae, Traycer AI…

134,230 33,827 Updated Mar 28, 2026

Verilog PCI express components

Verilog 1,562 398 Updated Apr 26, 2024

Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.

SystemVerilog 586 151 Updated Apr 2, 2026

uYouEnhanced (by @arichornlover) is an expanded version of uYou+ (made by @qnblackcat) with additional features and mainly made for non jailbroken users!

Logos 2,911 6,606 Updated Feb 28, 2026
Verilog 1 Updated Aug 28, 2025
Verilog 2 Updated Aug 8, 2025

GNU toolchain for RISC-V, including GCC

C 4,427 1,373 Updated Mar 28, 2026

An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器

Verilog 103 18 Updated Jul 4, 2024

The RISC-V Virtual Machine

C 1,232 85 Updated Apr 2, 2026

An open-source static random access memory (SRAM) compiler.

Python 1,030 257 Updated Mar 12, 2026

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

Python 3,472 453 Updated Oct 28, 2024
Verilog 1,957 463 Updated Apr 3, 2026

Ocelot: The Berkeley Out-of-Order Machine With V-EXT support

SystemVerilog 240 34 Updated Jan 14, 2026
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