Chisel: A Modern Hardware Design Language

Rocket Chip Generator

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

SonicBOOM: The Berkeley Out-of-Order Machine

Alpakka is a Reactive Enterprise Integration library for Java and Scala, based on Reactive Streams and Akka.

FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility

Simple RISC-V 3-stage Pipeline in Chisel

A basic SpinalHDL project

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ECU simulator

This repo contains source files and code for a synthesizable RISC-V processor with support for custom instructions in a co-processor.

A coverage library for Chisel designs