This repository was archived by the owner on Jan 17, 2023. It is now read-only.

Commits

History for

Commits on Jan 19, 2022

Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-2022-01-19' into staging
pm215
committed

Commits on Jan 18, 2022

Commits on Jan 17, 2022

target/s390x: Fix shifting 32-bit values for more than 31 bits

iii-i
authored and
huth
committed
target/s390x: Fix cc_calc_sla_64() missing overflows

iii-i
authored and
huth
committed
target/s390x: Fix SRDA CC calculation

iii-i
authored and
huth
committed
target/s390x: Fix SLDA sign bit index

iii-i
authored and
huth
committed

Commits on Jan 13, 2022

Commits on Jan 12, 2022

KVM: x86: ignore interrupt_bitmap field of KVM_GET/SET_SREGS
bonzini
committed
KVM: use KVM_{GET|SET}_SREGS2 when supported.

Maxim Levitsky
authored and
bonzini
committed
target/ppc: Set the correct endianness for powernv memory dumps

farosas
authored and
legoater
committed
target/ppc: Introduce a wrapper for powerpc_excp

farosas
authored and
legoater
committed
target/ppc: Use ppc_interrupts_little_endian in powerpc_excp

farosas
authored and
legoater
committed
target/ppc: Add MSR_ILE support to ppc_interrupts_little_endian

farosas
authored and
legoater
committed
target/ppc: Add HV support to ppc_interrupts_little_endian

farosas
authored and
legoater
committed
target/ppc: powerpc_excp: Group unimplemented exceptions

farosas
authored and
legoater
committed
target/ppc: powerpc_excp: Keep 60x/7x5 soft MMU logs active

farosas
authored and
legoater
committed
target/ppc: powerpc_excp: Extract software TLB logging into a function

farosas
authored and
legoater
committed
target/ppc: Add extra float instructions to POWER5P processors
legoater
committed
target/ppc: Add popcntb instruction to POWER5+ processors
legoater
committed

Commits on Jan 11, 2022

target/mips: Extract trap code into env->error_code

rth7680
authored and
vivier
committed
target/mips: Extract break code into env->error_code

rth7680
authored and
vivier
committed

Commits on Jan 9, 2022

target/m68k: don't word align SP in stack frame if M68K_FEATURE_UNALIGNED_DATA feature enabled

mcayland
authored and
vivier
committed

Commits on Jan 8, 2022

target/riscv: Implement the stval/mtval illegal instruction
alistair23
committed
target/riscv: Fixup setting GVA
alistair23
committed
target/riscv: Set the opcode in DisasContext
alistair23
committed
target/riscv: actual functions to realize crs 128-bit insns

authored and
alistair23
committed
target/riscv: modification of the trans_csrxx for 128-bit support

authored and
alistair23
committed
target/riscv: helper functions to wrap calls to 128-bit csr insns

authored and
alistair23
committed
target/riscv: adding high part of some csrs

authored and
alistair23
committed
target/riscv: support for 128-bit M extension

authored and
alistair23
committed
target/riscv: support for 128-bit arithmetic instructions

authored and
alistair23
committed