Highlights
Starred repositories
KernelFaRer: Replacing Native-Code Idioms with High-Performance Library Calls
Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension
Bao, a Lightweight Static Partitioning Hypervisor
Linux Capable 32-bit RISC-V based SoC in System Verilog
32-bit RISC-V microcontroller for embedded, FPGA and ASIC applications
RV64GC "Sliderule" Online Interactive Cheatsheets
clusterchallenge / BTScan
Forked from mboyd/BTScanBluetooth RSSI Remote Data Collection Framework
Example RISC-V Out-of-Order/Superscalar Processor Performance Core and MSS Model
Advanced Architecture Labs with CVA6
It contains a curated list of awesome RISC-V Resources.
Random instruction generator for RISC-V processor verification
OpenEmbedded/Yocto layer for RISC-V Architecture
The CORE-V CVA6 is a highly configurable, 6-stage RISC-V core for both application and embedded applications. Application class configurations are capable of booting Linux.
A personal site starter made with Gatsby https://www.gatsbyjs.org/starters/surudhb/gatsby-personal-site-template/
CCExtractor - Official version maintained by the core team
Servo aims to empower developers with a lightweight, high-performance alternative for embedding web technologies in applications.
This package binds to Cronet's native API to expose them in Dart.
A simple script to run speedtest(offical) CLI tool and store the results in CSV
Course materials and handouts for #100DaysOfCode in Python course
A Node.js Email bridge for Matrix
Python interfaces for ADI hardware with IIO drivers (aka peyote)
⭐️ Companies that don't have a broken hiring process