Skip to content
View jakubcabal's full-sized avatar

Block or report jakubcabal

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Transform your favorite cities into beautiful, minimalist designs. MapToPoster lets you create and export visually striking map posters with code.

Python 12,840 1,130 Updated Mar 4, 2026

🎧 Your Personal Streaming Service

Go 20,379 1,448 Updated Apr 11, 2026

An open source and lightweight music client for Subsonic, designed and built natively for Android.

Java 817 83 Updated Apr 10, 2026

The Free Software Media System - Server Backend & API

C# 50,209 4,630 Updated Apr 10, 2026

High performance self-hosted photo and video management solution.

TypeScript 97,554 5,354 Updated Apr 10, 2026

Install Jellyfin on your Samsung TV

Shell 1,410 78 Updated Oct 31, 2025

Style guide enforcement for VHDL

Python 236 60 Updated Feb 5, 2026

Opensource DDR3 Controller

Verilog 425 65 Updated Jan 18, 2026

10Gb Ethernet Switch

C 262 34 Updated Oct 16, 2025

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

Verilog 1,323 35 Updated Mar 12, 2026

AXI interface modules for Cocotb

Python 324 107 Updated Mar 13, 2026

The music player of today! 🌇

Python 2,585 111 Updated Apr 11, 2026

AXI, AXI stream, Ethernet, and PCIe components in System Verilog

SystemVerilog 704 111 Updated Apr 7, 2026

GUI file synchronization client that can sync with any cloud provider

Rust 1,613 60 Updated Nov 21, 2025

Ethernet interface modules for Cocotb

Python 76 29 Updated Sep 8, 2025

Basic ECP5 based GigE to SYZYGY interface.

HTML 213 20 Updated Sep 18, 2023

Create database files for the genealogytree LaTeX package from GEDCOM files

Python 11 2 Updated Mar 11, 2025

Open Logic FPGA Standard Library

VHDL 908 104 Updated Apr 9, 2026

Rich is a Python library for rich text and beautiful formatting in the terminal.

Python 56,041 2,096 Updated Apr 11, 2026

Universal utility for programming FPGA

C++ 1,590 332 Updated Apr 10, 2026

Portable HyperRAM controller

VHDL 65 14 Updated Dec 8, 2024

FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations

SystemVerilog 72 14 Updated Dec 17, 2025

Unit testing for cocotb

Python 169 87 Updated Dec 6, 2025

SatCat5 is a mixed-media Ethernet switch that lets a variety of devices communicate on the same network.

VHDL 496 43 Updated Mar 20, 2026

Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board

C++ 32 2 Updated May 15, 2023

Testbed for testing NetFlow/IPFIX network monitoring probes. Includes tools for PCAP generation and replay of 1/10/100G network traffic.

C++ 57 5 Updated Mar 17, 2026

LGBM2VHDL: Tool for converting LightGBM models into VHDL implementation.

Python 6 2 Updated Mar 17, 2026

Source code for Gramps Genealogical program

Python 2,869 501 Updated Apr 9, 2026

LED blink example design for the Arrow DECA FPGA board

Shell 16 1 Updated Jul 30, 2021

FPGA cards files for the NDK

VHDL 4 1 Updated Oct 2, 2024
Next