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Verilog AXI components for FPGA implementation

A curated list of resources on operating system design and implementation.

Modular hardware build system

fygen is a Python library for Feeltech Signal Generators (FY2300, FY6600, FY6800, FY6900 and more)

A tool to recover a fully analyzable .ELF from a raw kernel, through extracting the kernel symbol table (kallsyms)

A tiny Open POWER ISA softcore written in VHDL 2008

Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.

A self-service CA for OpenSSH

Interactive HTML BOM generation plugin for KiCad, EasyEDA, Eagle, Fusion360 and Allegro PCB designer

KiCAD to Boardview exporter reads KiCAD PCB layout files and writes ASCII Boardview files

FPGA implementation of DEC PDP-1 computer (1959) in Verilog, with CRT, Teletype and Console.

An atomic parts library for Ki-Cad.

Fuzzers for the Linux kernel

Oracle Linux UEK: Unbreakable Enterprise Kernel

Quartus Prime .pin to KiCAD .lib generator

Tool for visualizing GitHub profiles

80186 compatible SystemVerilog CPU core and FPGA reference design

toy language/compiler

Oldland CPU - a 32-bit RISC FPGA CPU including RTL + tools

simple commandline jtag stuff

qemu port for picoxcell

Picochip picoXcell kernel tree