PicoRV32 - A Size-Optimized RISC-V CPU

Verilog AXI components for FPGA implementation

HDL libraries and projects

SERV - The SErial RISC-V CPU

Verilog PCI express components

Full-throttle, wire-speed hardware implementation of Wireguard VPN, using low-cost Artix7 FPGA with opensource toolchain. If you seek security and privacy, nothing is private in our codebase. Our d…

The USRP™ Hardware Driver Repository

An Open-source FPGA IP Generator

RISC-V XV6/Linux SoC, marchID: 0x2b

3-stage RV32IMACZb* processor with debug

open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

Want a faster ML processor? Do it yourself! -- A framework for playing with custom opcodes to accelerate TensorFlow Lite for Microcontrollers (TFLM). . . . . . Online tutorial: https://google.githu…

Verilog UART

Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

Opensource DDR3 Controller

current focus on Colorlight i5 and i9 & i9plus module

The USRP™ Hardware Driver FPGA Repository

Example designs showing different ways to use F4PGA toolchains.

USB3 PIPE interface for Xilinx 7-Series

Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

Graphics demos

64x64 LED Cube based on the Colorlight 5a-75B LED driver board.

Hardware, Linux Driver and Library for the Zynq AXI DMA interface

Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker

Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs

ice40 USB Analyzer

Collection of projects for various FPGA development boards

Propeller 1 design and example files to be run on FPGA boards.

Change the pitch of your voice in real-time!

Use ECP5 JTAG port to interact with user design