RTL, Cmodel, and testbench for NVDLA

IC design and development should be faster，simpler and more reliable

HDL libraries and projects

Verilog library for ASIC and FPGA designers

OpenXuantie - OpenC910 Core

Source and Documentation files for USB C Industrial Camera Project, This repo contains PCB boards, FPGA , Camera and USB along with FPGA Firmware and USB Controller Firmware source.

OpenXuantie - OpenC906 Core

xkISP：Xinkai ISP IP Core (HLS)

xk265：HEVC/H.265 Video Encoder IP Core (RTL)

MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.

Test of the USB3 IP Core from Daisho on a Xilinx device

MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX with Hard MIPI PHY. Gbps UVC Video Stream Over USB 3.0 with C…