Real-time dashboard for monitoring Claude Code sessions with remote approval

This is a FPGA Project on Guitar Effects. Usually, guitarists use one guitar effect Stompbox per effect. This project aimed at using the FPGA hardware, which is significantly faster than Microcontr…

Like VexRiscv, but, Harder, Better, Faster, Stronger

The HW-CBMC and EBMC Model Checkers for Verilog

Filelist generator

Basic Common Modules

OpenTitan: Open source silicon root of trust

lowRISC Style Guides

SystemVerilog Extension Library -- a library of utilities for generic programming and increased productivity

This is the repository for the IEEE version of the book

Link python model and RTL simulation.

Enables access from cocotb/Pyuvm to SystemVerilog Verification IP. Besides re-usable code, this repo contains a simple example implementation

CPU assembly examples

auto tb generation for AMS designs . Quickly Build a UVM bench for an arbitrary analog design with external register controls

The ROHD Verification Framework is a hardware verification framework built upon ROHD for building testbenches.

Bazel Python Rules

Education kit for teaching embedded Linux system design and development on Arm-based platforms with lectures and labs (educational)

Education kit for teaching digital signal processing on Arm Cortex-M platforms with lectures and lab materials (educational)

Python interface for cross-calling with HDL

Veryl: A Modern Hardware Description Language