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IO_VREF disconnects from VCCIO and expose header pins.

Status: Open.

#8 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Rearrange R-T-L.

Status: Open.

#7 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Remove GND regist from regulator heat-sink pattern.

Status: Open.

#6 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Fix TMS tight angle line near FPGA pad.

Status: Open.

#5 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Change marking logical names to physical pin numbering.

Status: Open.

#4 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Add power and DONE LED.

Status: Open.

#3 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Add JTAG INIT jumper.

Status: Open.

#2 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017

Add clock generator.

Status: Open.

#1 In kekyo/Spartan2Bone;

· kekyo opened on May 2, 2017