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  • Westwood, NJ

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Achievements

Achievement: Pair ExtraordinaireAchievement: Starstruckx2Achievement: Pull SharkAchievement: Arctic Code Vault Contributor

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@marianoolmos
Mariano Olmos marianoolmos

🇪🇸 Spain, Madrid

@cocogab
Gab cocogab
Chief Attitude Officer @Fractal-Continuity Crashed @bucketmovie Ex. VC & sustainable finance. Science, action, and positive impact

@Fractal-Continuity

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Meow LinuxJS
I code.

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yadi23 yaadi23
Ingeniero electromecanico con con gusto ala programacion, novato en java, c, html,css,y soft en diseño mecanico y electronico como lo es solid ,autocad y proteu

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@tilinh90
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@JStk-Dev
JS JStk-Dev

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@snkd
Susant Khadka snkd
@shanyinshuiyue
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Wang tigerwang202

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@rshaker
Ron Shaker rshaker
@salkinium
Niklas Hauser salkinium
µC whisperer, datasheet connoisseur & ARM Cortex-M expert

in ur sillicon, mashing teh bits

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@wt641496728
wt641496728
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Joris Pellereau JorisPellereau
FPGA Engineer

Tours

@SherpaPierpa
Pierpaolo Pierozzi SherpaPierpa

ROME, ITALY

@Andful
Andrea Nardi Andful
@okhajut
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Saint-Petersburg, Russia

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@mergani
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persistent learner

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Matthew Dwyer Mluckydwyer
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@PatrickCPE
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I make rocks think :)
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Kristleifur Daðason kristleifur
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@hamzsabe
hamza hamzsabe
High level synthesis and I have more than two years of experience in ASIC Verification

Morocco

@oswald3141
Andrei Smoliakov oswald3141
FPGA developer. VHDL, Verilog and a bit of C++.

Finland

@std-max
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Dennis Addo seekaddo
Sr. Software Engineer @Kapsch TrafficCom AG || Ex @siemens AG. ||--> Ex @Frequentis AG.

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@IanBoyanZhang
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@iDoka
Dmitry Murzinov iDoka
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@dokard @deepware-ai Error: Unable to resolve

@JimLewis
Jim Lewis JimLewis
VHDL Verification Specialist, OSVVM author, VHDL Trainer (including on OSVVM), IEEE VHDL WG Chair, Yoga Teacher

SynthWorks / OSVVM Tigard, OR

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Julian Daube julidau
part time programmer

Germany

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@nopeslide
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@williamfabre
William Fabre williamfabre
Was a Student at UPMC master SAR Currently student at UGA

UGA / CEA France

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@RealPolitiX
R. Patrick Xian RealPolitiX
Techie in tech-town.

San Francisco, California, USA