A guide on training a model, testing it, and optimizing it for deployment on a Hailo8L NPU unsing MNIST

This is the official code implementation of A Survey on Unlearnable Data.

AMD Ryzen™ AI Software includes the tools and runtime libraries for optimizing and deploying AI inference on AMD Ryzen™ AI powered PCs.

Implementation of CNN using Verilog

Towards Backdoor Stealthiness in Model Parameter Space (CCS 2025)

[BRH YT CHANNEL] This repo contains all the code and ressources you need for the Zynq tutorials, ready to copy and paste.

NVDLA (An Opensource DL Accelerator Framework) implementation on FPGA.

A minimal GPU design in Verilog to learn how GPUs work from the ground up

[arXiv:2411.10023] "Model Inversion Attacks: A Survey of Approaches and Countermeasures"

Build your hardware, easily!

Open, Modular, Deep Learning Accelerator

Curated collection of papers about Deep Neural Network model extraction through Physical Side Channels.

Tutorial notebooks for hls4ml

《Machine Learning Systems: Design and Implementation》- Chinese Version

Dataflow compiler for QNN inference on FPGAs

Yosys Open SYnthesis Suite

LMDB wrapper for pytorch datasets.

A reading list for large models safety, security, and privacy (including Awesome LLM Security, Safety, etc.).

DPU on PYNQ

Code for the paper "What Can We Learn from Unlearnable Datasets?" (NeurIPS 2023)

Side-channel toolkit in Julia