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Stars

4 results for source starred repositories written in Verilog
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TILOS-AI-Institute / MacroPlacement

Macro Placement - benchmarks, evaluators, and reproducible results from leading methods in open source

Verilog 287 49 Updated Sep 19, 2025

lsils / benchmarks

EPFL logic synthesis benchmarks

Verilog 214 41 Updated Oct 1, 2025

bespoke-silicon-group / bsg_pipeclean_suite

Verilog 10 1 Updated Jan 9, 2020

wuerges / iccad2016uffs

Verilog 5 5 Updated Sep 24, 2018