ProjectionBall v7.x with RP2040

Implement a ChatGPT-like LLM in PyTorch from scratch, step by step

Debian12 Boot Image (U-boot, Linux Kernel, Debian12 RootFS) for ZYBO/ZYBO-Z7/PYNQ-Z1/DE10-Nano/DE0-Nano-SoC

Let's write RISC-V CPU in Veryl!

An JLC PCB Fabrication Plugin for KiCad

SystemVerilog linter

Simple Vitis/Vivado version management

SystemVerilog parser library fully compliant with IEEE 1800-2017

Qflow full end-to-end digital synthesis flow for ASIC designs

Verilator open-source SystemVerilog simulator and lint system

Elixir API for Zenoh

Erlang/OTP

Code generation tool for control and status registers

Veryl: A Modern Hardware Description Language

agent-less and lightweight communication library compatible with rclcpp for embedded devices

RISC-V Formal Verification Framework

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Ubuntu 20.04 Desktop Images (for Xilinx:Zynq Ultrascale+ MPSoC)

Shell scripts to build cross compilers

HOS-V4 Advance (uITRON4.0 Real-Time OS) local version

FPGA Clock Configuration Device Driver for Linux

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq-Zybo:PYNQ-Z1 Altera:de0-nano-soc:de10-nano)

User space mappable dma buffer device driver for Linux.

Making JSON webapi server with Rust and Rocket 🚀

A CUDA implementation of Segmentation SGM

FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)

The Sphinx documentation generator

Deep Learning for humans

Seamless operability between C++11 and Python