Highlights
- Pro
Naveen
navi2311
master graduate in electrical engineering at San Jose State University, I have completed multiple courses and certifications on FPGA, Verilog, System Verilog,
BANOTH BALU
banothbalu
FPGA Design & Validation Engineer | RTL Coding in VHDL & Verilog | Vivado | System Integration & Debugging | Digital Board Validation | DSP
RFMW Innovations Lab Private Limited Hyderabad Hyderabad
Gab
cocogab
Chief Attitude Officer @Fractal-Continuity
Crashed @bucketmovie
Ex. VC & sustainable finance.
Science, action, and positive impact
@Fractal-Continuity
Rui Li
lirui-shanghaitech
A Ph.D. student at ShanghaiTech University
ShanghaiTech University Shanghai, China
Shahbaz Hussain
mshahbazhussain
Interested in
• Low-power Energy-Efficient circuits
• Spintronics
• Hardware security
• FPGA H/w implementation
• Approximate computing
AMU Aligarh
Moktar
Onizuka09
Embedded and IoT developer. Computer vision enthusiast.
Higher Institute of Computer science ISI Ariana Tunisia
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