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Starred repositories

3 stars written in Verilog
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Open-source, low-cost 10.5 GHz PLFM phased array RADAR system

Verilog 3,539 746 Updated Mar 22, 2026

3-stage RV32IMACZb* processor with debug

Verilog 1,015 81 Updated Mar 14, 2026

Implementation of Nock specification in hardware

Verilog 37 3 Updated Oct 28, 2024