A cross-platform x86 assembler with an Intel-like syntax

A FPGA friendly 32 bit RISC-V CPU implementation

A sample OS as demonstrated in the book Operating System: From 0 to 1

RISC-V Guide. Learn all about the RISC-V computer architecture along with the Development Tools and Operating Systems to develop on RISC-V hardware.

RISC-V architecture concurrency model litmus tests

Code for the "fake BIOS" RISC-V example