via SEBHC forums

Prior to XCON/8, there were two ROMs used, a version of PAM/8 and the H17ROM:

0000-07FFH - PAM/8 (0-2K) 0800-17FFH - Unassigned (2K-6K) 1800-1FFFH - H17ROM (6K-8K)

(I think some of the earlier versions of PAM/8 were only 1K, but I haven't worked with any of them.)

When XCON/8 came around, it complicated things just a bit. XCON/8 is a 4K EPROM, and it contains an advanced version of PAM/8 and the H17ROM code. The H17 code is stored in the ROM at one location, but copied during the init process to another location, so you have what I'll call a 'boot map' and a 'runtime map.'

Boot Map: 0000-0FFFH - XCON/8 (0-4K - includes PAM/8 and H17ROM) 1000-1FFFH - Unused (4K-8K)

After init, the runtime map is:

0000-07FFH - XCON/8 enhanced (0-2K) 0800-0FFFH - Upper half of XCON/8 - H17ROM, but in wrong location (2-4K) 1000-17FFH - unassigned (4-6K) 1800-1FFFH - H17ROM in RAM @ correct location (6-8K)

Finally, when PAM/37 is added, the mix is simplified a bit. First, PAM/37 (4K) replaces the XCON/8 ROM as the boot/monitor ROM. XCON/8 is then moved within the memory map from the old location of 0000-0FFFH to 1000-1FFFH (4K-8K) area:

0000-0FFFH - PAM/37 (0-4K) 1000-17FFH - XCON/8 lower half - unused, but present (4K-6K) 1800-1FFFH - XCON/8 upper half, which is H17ROM @ correct address (6-8K)

via SEBHC forums

I'm not familiar enough with the H8 memory map, but it is similar enough the H89 memory map for the same software to work on both. And I am familiar with the H89 map. So let me describe that.

The main memory is called "system RAM" by Heath. It consists of 1-4 groups of eight 4116 16k dynamic RAM chips. 3 groups fit on the CPU board. A 4th group can be added with a plug-in memory card on the left side memory expansion slots.

When CP/M is running, you have an all-RAM system starting at address 0 (called 0 org mode) and extending up to 16k, 32k, 48k, or 64k depending on whether you have 1, 2, 3, or 4 banks of 16k RAM chips installed.

An all-RAM system is fine, but it must first be initialized. Heath provides a special start-up bank of memory called "Bank 0" for this purpose. Bank 0 contains 1-3 ROMs and 2-4 static RAMs. On power-up or reset, bit 5 of General Purpose Port A (hex address F2) is reset to 0. This enables Bank 0, which replaces the lower 8K of the System memory (0000-1FFF hex). Setting bit 5 high removes Bank 0 memory, giving you an all-RAM system.

When HDOS is running Bank 0 is enabled. In this configuration, the first 8k (0000-1FFF hex) still had the ROMs and floppy RAM. User programs went into System RAM above 8k (2000 hex and up). This meant that even with 64k of RAM installed, user programs only had 56k available.

Here is a chart (view it with a fixed-width font like Courier to make the columns line up):



With Bank 0 enabled, the lower 8k of System RAM can not be read. However, there is a quirk. If you write to the ROM addresses while bank 0 is enabled, the data is written into the System RAM instead (as you obviously can't write to the ROMs). This odd feature is used to initialize the System RAM from 0-8k to boot CP/M. There is one more quirk. On power-up or reset, bit 7 of port 7F (on the H17 hard-sector floppy controller board) is reset to 0. This write-protects the Bank 0 RAM. To write to the Bank 0 floppy RAM, set bit 7 of port 7F to 1.

I Hope this helps! I don't know if the H8 copies this setup exactly, or added its own quirks.