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An attempt to recreate the RP2040 PIO in an FPGA

Verilog 307 31 Updated Jun 6, 2024

An FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器,用于驱动BLDC/PMSM电机。

Verilog 812 231 Updated Sep 15, 2023

C28x compatible implementation of an ePWM module on FPGA

VHDL 4 4 Updated Nov 3, 2017

Verilog writer plugin for RgGen

Ruby 8 3 Updated Dec 22, 2025
Python 75 31 Updated Jul 30, 2021
Verilog 11 7 Updated May 27, 2019
Verilog 7 7 Updated Jan 23, 2018

UART (9600/115200) to VLC (RS code/Manchester code/8x Sampling Syncronization)

Verilog 4 5 Updated Nov 1, 2019

simulation env for swerv_th1, which is base on vcs & verdi

SystemVerilog 5 1 Updated Mar 25, 2019

A small, light weight, RISC CPU soft core

Verilog 1,490 177 Updated Dec 8, 2025

A small, light weight, RISC CPU soft core

Verilog 1 1 Updated Apr 1, 2019

Python - 100天从新手到大师

Python 1 1 Updated May 29, 2018