Skip to content
View theshteves's full-sized avatar
🥦
Researching FPGA Compilers
🥦
Researching FPGA Compilers

Organizations

@SpartanHackers @EastSix @web-scape @SpartanCS @creators-who-code

Block or report theshteves

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
@cfregly
Chris Fregly cfregly
[AI Systems Performance Engineer] [3x O'Reilly Author] [Former AWS, Databricks, Netflix]

AI Systems Performance Engineer San Francisco, CA

@toddmaustin
Todd Austin toddmaustin
Dad, Spouse, Brother, Professor, Sherpa

University of Michigan Ann Arbor, Michigan, USA

@rad68
Ruslan Dashkin rad68
Yale PhD in Electrical Engineering | CPU Architect | Self-timed circuits enthusiast
@grebe
Paul Rigge grebe

Google San Francisco Bay Area

@Flinner
Flinner Flinner
hey!! stop stalking me :)

/home/flinner

@jellyterra
Jelly Terra jellyterra
Gen Z. EECS including computer architecture, formal verification, compiler and HLS.

Gensokyo Silicon n.y. Sein und Zeit

@likewise
Leon Woestenberg likewise
Freelance embedded systems consultant targeting interesting projects with bare-metal, RTOS, Linux, kernels, drivers, SoC, PCI Express and FPGA technologies.

Sidebranch Switzerland

@adamgreig
Adam Greig adamgreig
🚀 engineer; also electronics, RF, signal processing & comms, embedded and scientific software, FPGAs, Rust. He/him.

Oxford, UK

@wickedfoo
Jeff Johnson wickedfoo
SIMD + GPU + FPGA + ASIC stuff for AI/ML. I wrote the original PyTorch GPU backend, GPU Faiss, and many other AI GPU things broadly in use across the industry.

Meta Fundamental AI Research (FAIR) Jackson, WY

@ATaylorCEngFIET
Adam Taylor ATaylorCEngFIET
Adam Taylor is an expert in design and development of embedded systems and FPGA's for several end applications.

http://adiuvoengineering.com/ United Kingdom

@liubenyuan
liubenyuan liubenyuan
Electrical Impedance Tomography, Computational Graphs, Inverse Problems, HLS/SpinalHDL for FPGA Accelerated Algorithms

Xi'an

@sampsyo
Adrian Sampson sampsyo
Hi! I'm a terrifying Cornell professor, the kindly progenitor of @beetbox, and pretty into The Magnetic Fields. 6'2".

Cornell University Ithaca, NY

@rachitnigam
Rachit Nigam rachitnigam
Incoming EECS professor at MIT. Creator of @calyxir. Up to no good.

Massachusetts Institute of Technology

@drom
Aliaksei Chapyzhenka drom
always @ posedge

@sifive Terra ⴲ

@Lefteris-B
Lefteris Batzolis Lefteris-B
Digital\Embedded Engineer
@nbingham1
Ned Bingham nbingham1
Computer Engineer, Hiker, and Climber. My research focuses on advanced circuit design methodologies and systems.

Broccoli, LLC Bloomington, IN

@broccolimicro
Broccoli broccolimicro

United States of America

@aolofsson
Andreas Olofsson aolofsson
Democratizing silicon

Zero ASIC Corporation Cambridge, MA, USA

@Dinistro
Christian Ulmann Dinistro

NextSilicon Zurich, Switzerland

@kdmarrett
Karl Marrett kdmarrett
Reka AI | UCLA PhD | UW

Reka AI Seattle, WA

@dotkrnl
Jason Lau dotkrnl
ucla phd, tsinghua alumnus | eda researcher with full-stack experience on silicon, compiler, devops, hpc, algorithm, art

Jump Trading Santa Clara & Hong Kong

@clairexen
Claire Xen clairexen
Claire Xenia Wolf

@YosysHQ Vienna

@shuckc
Chris Shucksmith shuckc

GSA, @XTXMarkets, @BitMEX London, UK

@hanchenye
Hanchen Ye hanchenye
PhD student at UIUC

ECE@UIUC Urbana, IL, USA

@ARC-Lab-UF
ARC Research ARC-Lab-UF

Gainesville, Florida

@merrymercy
Lianmin Zheng merrymercy
dev efficiency engineer

xAI Bay Arena, CA

@BerkeleyLab
Berkeley Lab BerkeleyLab
Lawrence Berkeley National Laboratory

Berkeley, CA

@hasheddan
Daniel Mangum hasheddan
A complex system that works is invariably found to have evolved from a simple system that worked.

@golioth Durham, NC

@riscv-collab
RISC-V Collaboration riscv-collab
The Open-Standard Instruction Set Architecture

Switzerland

@riscv-admin
RISC-V Administrative Materials riscv-admin
The Open-Standard Instruction Set Architecture

Zurich, CH

@ggerganov
Georgi Gerganov ggerganov
I like big .vimrc and I cannot lie

@ggml-org Sofia, Bulgaria

@arminbiere
Armin Biere arminbiere
Professor University of Freiburg

Freiburg im Breisgau, Germany

@geerlingguy
Jeff Geerling geerlingguy
Father, author, developer, maker. Sometimes called "an inflammatory enigma". #stl #drupal #ansible #k8s #raspberrypi #crohns

Midwestern Mac, LLC St. Louis, MO

@nathankurt
Nathan Kurt nathankurt
Former SpartaHack Executive Co-Director GitHub Campus Expert Alumni

ShopStyle Detroit, MI

@lattner
Chris Lattner lattner

Bay Area, California, USA

@cothan
Duc Tri Nguyen cothan
Ph.D at George Mason University and member of Cryptographic Engineering Research Group.

USA

@Neats29
Anita Neats29
software engineer @echo-health Previously @foundersandcoders

London, UK

@mickeygousset
Mickey Gousset mickeygousset
Staff Devops Architect on the GitHub FastTrack Team

GitHub Tupelo, MS

@morganlee123
Morgan morganlee123
Human Behavior and AI

RAND Corporation Washington, DC

@ndri
Andri Soone ndri
full snack developer

@wikibusiness Copenhagen

@ljharb
Jordan Harband ljharb
software engineer/nerd/teacher/will try anything once; surgeon with git rebase. @tc39 ex @coinbase @airbnb @twitter @MobBase. Fav punctuation ⸮, scent petrichor

@herodevs @tc39 Hillsborough, CA