Tengine is a lite, high performance, modular inference engine for embedded device

Machine learning compiler based on MLIR for Sophgo TPU.

tvm learn

NVIDIA Linux open GPU kernel module source

A self-contained online book containing a library of FPGA design modules and related coding/design guides.

Hardware implementation of a configurable Convolutional Module.

Rachit Nigam's personal website.

An optimized neural network operator library for chips base on Xuantie CPU.

Open deep learning compiler stack for Kendryte K210 AI accelerator

OpenXuantie - OpenC910 Core

Berkeley's Systolic Array Generator

BaseJump STL: A Standard Template Library for SystemVerilog

MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)

Wavious DDR (WDDR) Physical interface (PHY) Hardware

A dedicated graphical processor for ray tracing

System Verilog based Verification of MIPS 5 staged pipelined processor using UVM environment

Verilog implementations of 6 different hardware multiplier architectures