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10 public repositories
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16-bit PC based on SediCiPUv2 CPU
Updated
Apr 5, 2026
Verilog
Contains the detailed description about 16bit hardware ALU developed using 74HC (XOR,AND,OR,MUX) ICs only.
Updated
Mar 11, 2026
Verilog
A 16-bit Instruction Set Architecture.
Updated
Oct 24, 2025
Verilog
A 16-bit RISC Processor, with a four stage pipeline
Updated
Apr 3, 2025
Verilog
16-bit 5 stage pipelined Mips processor
Updated
Nov 22, 2024
Verilog
experimental retro 16 bit cpu written in verilog xilinx vivado intended for fpga Cmod S7 from Digilent
Updated
May 29, 2024
Verilog
experimental retro 16 bit cpu written in verilog xilinx vivado intended for fpga Cmod S7 from Digilent
Updated
May 29, 2024
Verilog
experimental retro 16 bit cpu written in verilog xilinx vivado intended for fpga cmod s7 from digilent
Updated
May 29, 2024
Verilog
Updated
Sep 26, 2022
Verilog
A 16-bit, 5-stage RISC processor. RTL description in Verilog. Includes assembler, simulator, and example programs.
Updated
Feb 5, 2020
Verilog
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