Vera: a programming language designed for LLMs to write
-
Updated
Apr 8, 2026 - Python
Vera: a programming language designed for LLMs to write
🔧 Explore iADC for dual-slope and integrating ADC designs, combining analog modeling, digital RTL, and lab validation all in one place.
🔧 Set up and verify mise installations with a customizable script to ensure your CI/CD environment is consistent and reliable.
This platform mainly focuses on automated test bench generation and rtl automation for RISC-V processors
🚀 Enhance your macOS experience with XKey, a modern Vietnamese input method designed for compatibility, efficiency, and user-friendly features.
Metadata encoding and extraction for AI-generated content
Bruno Verifies is a student-run verification service for the Brown University Discord community.
IronBee CLI — Verification and Intelligence Layer for Agentic Development
Continuous Integration, Verification, Enhancement, and Testing
📰 Verify news authenticity with TruthChain, a decentralized platform that uses IPFS and Polygon for secure, immutable records.
GitHub Action and CLI to validate, monitor, and publish verifiable skills (SKILL.md) via Registry Broker
An advanced SAT solver
🔍 Optimize your file security with this high-performance cryptographic hash utility, featuring advanced algorithms and SIMD acceleration for rapid processing.
Know how your AI coding agent fails. Deterministic verification of agent edits against filesystem reality. 26 sensors, zero dependencies.
🔄 Migrate large directories with ease using symbolic links and reliable file copying on Windows, all with a simple PowerShell CLI or WPF GUI.
Reusable and scalable verification framework for Deep Neural Network (DNN) accelerators using Pyuvm, Cocotb, and Portable Stimulus Standard (PSS). Supports generic layer-wise verification and automated multi-layer scenario generation.
🔍 Explore and implement secure provenance tracking with this template, ensuring project integrity and compliance throughout your development lifecycle.
⚙️ Transform VHDL design processes with vhdl-4hn, a lightweight library that streamlines hardware description and enhances code readability.
🔍 Explore VHDL implementations of GKR protocols for efficient proof systems, enhancing performance in verification and computational tasks.
Add a description, image, and links to the verification topic page so that developers can more easily learn about it.
To associate your repository with the verification topic, visit your repo's landing page and select "manage topics."