vhd

Controle de motor DC + Sensores fim de curso implementado em VHDL para o kit DE0-CV utilizado na matéria de Elementos de sistemas do 3 semestre de Engenharia da computação do Insper.

fpga robo altera vhd l298n l298 altera-fpga l298n-h-bridge engenharia-de-computacao insper de0 de0cv de0-cv robot-fpga robo-fpga

Updated Nov 1, 2019
VHDL

romybompart / Basys3-clock-alarm-with-buzzer

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Digital clock implemented in vhdl for the Basys 3 Board from Digilent.

clock vhd buzzer digit digital-clock basys3 digilent vhdl-code basys3-fpga basys3-clock-alarm buzzer-termination

Updated Dec 14, 2020
VHDL

kevinkirsten / ControleSalaDeReunioesVHDL

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Circuito de controle de sala de reuniões implementado em VHDL

vhdl vhd vhdl-code

Updated Jun 28, 2021
VHDL

Matozinho / neander

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NEANDER - A basic theorical computer

hardware simulation vhdl vhd hardware-designs neander

Updated Sep 20, 2021
VHDL

seanpm2001 / Learn-VHDL

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A repository for showcasing my knowledge of the VHDL programming language, and continuing to learn the language.

language education collection knowledge gplv3 vhdl vhd md txt gpl3 vhdl-collection vhdl-language learn-vhdl vhdl-lang

Updated Nov 27, 2021
VHDL

mehdiben7 / INF1500-A22

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Scripts VHDL pour le cours Logique des systèmes numériques (INF1500) de Polytechnique Montréal

vhdl vhd digital-design

Updated Nov 28, 2022
VHDL

MarianaGranados-09 / FPGAs

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FPGAs in VHDL

vhdl vhd quartus

Updated Apr 20, 2023
VHDL

Rahaf0B / Computer-Architecture

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asm vhd

Updated Sep 6, 2023
VHDL

seigtm / circuitry-spbpu-homework

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This repository is dedicated to storing and managing homework assignments for the course "Digital Circuit Design: Modeling and Description Languages." The assignments primarily involve VHDL source code.

homework vhdl vhd homework-assignments spbpu vhdl-code vhdl-examples maxplus vhdl-language