App that Generate VHDL Code and Testbench template file
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Updated
Jan 17, 2025 - HTML
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vhdl-testbench
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CPRE488 MP1 - VHDL AXI4-Lite IP for 6-ch PPM capture & generation on ZedBoard, plus a C app for relay/debug, record/play, and filter modes; Vivado/Vitis + Nix dev env.
drone cpp vhdl verilog xilinx drones verilog-hdl xilinx-fpga c-language c-programming xilinx-vivado vhdl-modules xilinx-zynq vhdl-testbench
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Updated
Mar 21, 2025 - HTML
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