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artix7

Here are 15 public repositories matching this topic...

tangodelta217 / nema-connectome-artix7

Deterministic NEMA v0.1 toolchain for connectome simulation on Artix-7: IR validation, bit-exact fixed-point reference, HLS flow, and reproducible artifacts.

fpga hls verification vivado celegans reproducibility formal-verification connectome artix7

Updated Mar 3, 2026
Python

f4pga-arch-defs

f4pga / f4pga-arch-defs

FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.

Updated Mar 17, 2026
Jupyter Notebook

ECASLab / cynq

PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.

linux fpga runtime amd xilinx pynq artix7 alveo cynq

Updated Feb 23, 2026
C++

ccparke4 / STM32_FPGA_Comm

High-speed heterogeneous computing bridge between STM32H7 and Artix-7 FPGA using SPI and FreeRTOS

spi-interface fpga stm32 freertos spi xilinx systemverilog i2c-bus hardware-acceleration cortex-m7 dma memory-mapped embedded-c artix7 stm32h7 heterogeneous-computing stm32cubeide co-processing

Updated Feb 9, 2026
C

JuanP-G / FPGA-Enigma-Machine

Implementación hardware VHDL de la Máquina Enigma sobre FPGA Artix-7 (Basys 3). Incluye aritmética modular, lógica de rotores electromecánicos y datapath dedicado.

cryptography fpga vhdl vivado enigma-machine basys3 artix7 hardware-design

Updated Feb 6, 2026
VHDL

AyushVerma17 / advanced-vending-machine-rtl

Comparative study of Mealy vs Moore FSM architectures in Verilog - Multi-item vending machine controller with timing analysis, and power metrics (79-81.5MHz on Artix-7)

fsm fpga state-machine verilog digital-design xilinx-vivado mealy-machine artix7 moore-machine comparative-study vlsi-design rtl-design hardware-design

Updated Oct 2, 2025
Verilog

chili-chips-ba / tango-with-pango

Playground for PangoMicro FPGAs.

benchmarking fpga rtl verilog artix7 spartan7

Updated Sep 2, 2025
Verilog

prjxray

f4pga / prjxray

Documenting the Xilinx 7-series bit-stream format.

toolchain tools fpga xilinx vivado fuzzer xilinx-fpga bitstream artix7 artix kintex7 symbiflow

Updated Jun 5, 2025
Python

komihori / XCM-023-100T

fpga artix7 artix-7 fpga-constraints xcm-023-100t xc7a100t xc7a100tfgg484-1

Updated Sep 21, 2024
Tcl

deba0272 / NIELIT_VLSI_1_WEEK_TRAINING_PROGRAM

fpga vlsi verilog-hdl xilinx-vivado artix7

Updated Sep 14, 2024

agicy / buptLab-digital_design

北京邮电大学 2023-2024 春季学期《数字逻辑与数字系统课程设计》——电子钟、药片装瓶系统和贪吃蛇

vivado systemverilog bupt digital-design artix7

Updated Aug 31, 2024
SystemVerilog

FallingLights / Audio-Processing-Artix-7

Realtime Audio Processing on Artix-7 FPGA written in VHDL

fpga vhdl audio-processing artix7 artix-7

Updated Nov 18, 2022
VHDL

prjxray-db

f4pga / prjxray-db

Project X-Ray Database: XC7 Series

toolchain bitset database tools fpga xilinx xilinx-fpga artix7 artix kintex7 symbiflow prjxray

Updated Dec 14, 2021
Shell

mesarcik / MANDELBROT

A Verilog based Fractal Set Generator for the Xilinx Artix 7

fpga pixel fractal mandelbrot xilinx undergraduate xilinx-ise porch vga-driver hsync artix7

Updated Dec 10, 2021
Verilog

diegofgcoelho / dct_1d_vhdl

RTL description of 1D DCT using algebraic integers

vhdl rtl dct artix7

Updated Feb 4, 2018
VHDL

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