Implementations of SIMD instruction sets for systems which don't natively support them.

A collection of highly optimized, SIMD-accelerated (SSE, AVX, FMA, NEON) functions written in C

Fast avx2/fma3 dgemm and sgemm subroutines for medium to large matrices(>2000*2000) on haswell/skylake/zen processors, with performances comparable to MKL.

X86-64 bilateral instruction tokenizer implemented in C. Supports the following processor extensions: AES, AVX, AVX2, AVX512, FMA, MMX, SSE, SSE2, SSE3, SSE4, x87(FPU), VMX. In order to ease testing, a diassembler which transforms tokens into compilable assembly (for NASM compiler) has been implemented.

Python library to detect CPU SIMD capabilities.

offline artistic image generator

Test FMA on RaspberryPI CPU&GPU

Framework for making computation on CPU

Benchmarks on SIMD instructions : SSE, AVX, AVX512

Sum of three floating-point values with correct rounding

Solaris FMA port for FreeBSD

Safety-hardened GEMM (matrix multiply) implementation achieving 169.8 GFLOPS on Intel i9-14900. Built for embedded systems and safety-critical applications where reliability matters as much as speed. 162× faster than naive, zero UB, fully validated.