SpatialAveragePadding padding and ceil kernels#134
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I think this condition is inverted. When you include the padding region, you should divide by pool_size.
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Actually, as is both conditions are the same. I think you should replace the ((hend - hstart) * (wend - wstart)) by kernel_h*kernel_w.
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I made some inline coments. Could you add some tests for the new cases ? |
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Tests are missing test for |
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Ah :-) Right :-) |
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Hmmm, it looks like this compares with the cpu version? Does that mean there is a cpu implementation of ceil average pooling to compare with? |
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@hughperkins yes, there is a CPU implementation, check torch/nn#365 |
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(Note that I'm comparing it against my fork, with the corrections mentioned in this PR e040398 ) |
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(ported to clnn, in branch, https://github.com/hughperkins/clnn/compare/master...avgpool?expand=1 ; pending merge of torch/nn#365 ) |
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I think that after https://github.com/szagoruyko/cunn/pull/2 is merged, this is fine to go. |
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Looks like this is ready to be merged right? :-) |
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@hughperkins @szagoruyko was comparing this implementation against |
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Can we at least merge in the |
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The thing is, both |
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Ok... I think for my own usage I'm not using setCountExcludePad. Perhaps we could split this PR into two: one for ceilmode, and one for setCountExcludePad? An easy way to do that could be to just add an |
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Hum, yeah, splitting the PR is a possibility... I'll have a look at it today when I have some time. |
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this PR is almost ready to be merged, the only problem is the difference between it and COUNT_EXCLUDE_PADDING mode of cudnn, which we believe to be a bug in cudnn. will update as soon we find out more. |
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@szagoruyko Mmmkay. What if ... can we add something like |
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I think this should be nInputCols >= kW - 2 * padW, and the same thing for H.
Currently, this condition doesn't allow the case of 1x1 input to be used with kW=kH=3 and padW=padH=1 (which I think should be valid).
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fixed Francisco's comments and squashed |
SpatialAveragePadding padding and ceil kernels
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Thanks Sergey. |
cuda part for torch/nn#365