Ahmed Abdelazeem
abdelazeem201
I am a Hardware Engineer with a special interest in Physical ASIC Design.
Synopsys Dublin, Ireland.
Ahmed Mousa
ahmdmusa
Fresh grade interested in Analog/Mixed-Signal Integrated Circuit - EGYPT
Zagazig
Dimitris Alexandridis
adimitris
Computer Engineer @ Smart Junctions, VivaCity
Cambridge University London
RISC-V International Open Source Laboratory
RIOSLaboratory
The RISC-V International Open Source Laboratory (RIOS Lab) will bring the research effort of RISC-V CPU ecosystems from UC Berkeley to the rest of the world
Mike Thompson
MikeOpenHWGroup
Functional verification of RTL for ASICs and FPGAs. Sole Proprietor at Covrado and Director of Engineering, Verification Task Group at the OpenHW Foundation.
@openhwgroup Ottawa, Ontario, Canada
VSD
vsdip
Open source developers partner with VSD and @kunalg123 for our approach to build content centric, research oriented flow to build a design and community.
VLSI System Design Online
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