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[Tracking] AMD: training on RDNA 1 cards (RX 5700 XT, gfx1010) #11614

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@LeoBorcherding

Tracking issue for training on AMD RDNA1 (RX 5000 series, gfx1010) with Unsloth. Today it does not work at all; with the three changes linked below it does, on Windows, for the models that do not need Triton dot products. On Linux (WSL2) the same stack is confirmed on RDNA2 but the RDNA1 card is stopped by the WSL GPU driver before ROCm even starts, details under Still open.

Short version

blocker symptom fix
Triton's default AMD buffer ops on gfx1010 every Triton kernel launches with hipSuccess and writes nothing. No error, just zeros, so training "works" and learns garbage. Worse: Triton and Inductor cache the compiled kernels without the knob in the key, so one run with buffer ops on poisons every later run with them off (-inf then nan) AMDGCN_USE_BUFFER_OPS=0 plus separate compile caches. PR: #11615 (merged 2026-09-23)
any tl.dot in fp16 RDNA1 has no dot instructions, Triton emits v_dot2 anyway: LLVM ERROR: Cannot select: AMDGPUISD::FDOT2, process aborts. Kills every fla kernel, so every gated-delta model (Qwen3.5) route those GPUs to transformers' pure-torch gated-delta path. PR: unslothai/unsloth-zoo#1356
that pure-torch path in eager mode its l2norm reduces in float16 and overflows; loss finite at step 1, grad_norm NaN, NaN after. Only shows up with torch.compile off, which is how Unsloth Studio runs on Windows ROCm (TORCHDYNAMO_DISABLE=1), so every scripted run missed it same PR: rebind l2norm to a float32-reducing copy on transformers' modules and on unsloth's compiled copy of the model
offloaded activations come back in the staging buffer's dtype bf16 buffers on a card with no bf16: LLVM abort on stock code unslothai/unsloth-zoo#1316

What trains on an RX 5700 XT once those are in

Windows 11, torch 2.12.0+rocm10.2 (AMD multi-arch nightly; the stable 2.11.0+rocm7.14.1 gives the same numbers, see the installer PR), triton-windows 3.8.0.post28, unsloth 2026.9.7, seq 1024, batch 2, 16-bit LoRA, adamw_torch (no bitsandbytes kernels on that stack).

model result
Qwen3-1.7B 3/3 steps, losses 0.0207428 0.0207428 0.0191635, within noise of the RX 6500 XT, offload and double buffering on
Qwen3.5-0.8B (pure-torch gated delta) 3/3 steps, 0.0367267 0.0367267 0.0281454, RX 6500 XT with fla kernels gives 0.0366737 / 0.0281048
Qwen3-1.7B QLoRA and Qwen3.5-0.8B QLoRA both train (bitsandbytes 4-bit + 8-bit AdamW work on gfx1010), see QLoRA below
Qwen3.5-0.8B through the real Unsloth Desktop (torch swapped by hand in the main install, torch.compile off) 30/30 steps on alpaca-cleaned, 16-bit LoRA, mean loss 1.41, final 1.54, with the l2norm fix in unslothai/unsloth-zoo#1356; without it every step after the first was NaN and the app still said Completed
gemma-3-270m trains, but the compiled module gives a different loss curve every run (see below)

Background for anyone new to this

On AMD, PyTorch and Triton compile GPU code per card generation. RDNA1 (2019: RX 5700 XT, 5600 XT, 5500 XT) is the oldest generation Triton still targets and it is missing two things newer cards have: bf16 support and dot-product instructions. Everything above follows from that. RDNA2 (RX 6000) has the same bf16 gap, which is what unslothai/unsloth-zoo#1316 was found on, but does have dot instructions.

Still open

  • Linux (WSL2). Tried. The RDNA1 card is blocked one layer lower than anything Unsloth touches: the WSL ROCm backend (librocdxg) has to reserve one GPU virtual-address range that every adapter accepts, and the 5700 XT's Windows driver refuses every reservation size tried, from the default 16 GB down to 1 GB (dxgkio_reserve_gpu_va: EOVERFLOW in dmesg). With both cards present AMD's shipped library crashes at init for both; a locally rebuilt one with a per-process adapter filter brings the 6500 XT back, and on it the same Linux multi-arch stack (torch 2.12.0+rocm10.2, AMD's own triton 3.8.0+rocm10.2) trains with GPUs without bf16 (AMD RX 5000 / 6000): keep offloaded activations in their own dtype so Qwen3.5 training doesn't crash unsloth-zoo#1316: Qwen3.5-0.8B 0.0366620 0.0366620 0.0281449, Qwen3-1.7B 0.0207567 0.0207567 0.0191435, both 3/3 steps. So Linux-on-WSL is confirmed for RDNA2 and not reachable for RDNA1 until the driver accepts a reservation; a bare-metal Linux box would not go through this path at all and is untested.
  • Installer. PR: Unsloth Studio (AMD RDNA 1, Windows): install ROCm torch for the RX 5700 XT from AMD's multi-arch index #11755 (draft). Windows installers route gfx1010 / gfx1011 / gfx1012 to AMD's stable multi-arch index (repo.amd.com/rocm/whl-multi-arch), pinned to 2.11.0+rocm7.14.1 with torchvision and torchaudio on the same tag (an earlier revision used the 10.2 nightly), no torchaudio (none published). A fresh install from that branch on this box with only the 5700 XT visible produced the multi-arch torch and trained Qwen3.5-0.8B (LoRA) and Qwen3-1.7B (QLoRA) with the same losses as the hand-built stack. Linux is left as is until someone runs it on bare metal.
  • gemma compiled path. With unsloth's compiled modules, gemma-3-270m gives a different loss curve on every run on RDNA1, and on the RX 6500 XT under ROCm 10.2 it went NaN from the first backward in 2 of 3 runs. UNSLOTH_COMPILE_DISABLE=1 makes both cards bit-identical and correct, and plain transformers+peft in fp32 is bit-identical across both cards. Separate issue: to follow
  • Triton upstream. The buffer-ops silence and the FDOT2 abort are Triton AMD backend bugs for gfx1010. Upstream report: to follow
  • QLoRA. Works. The AMD Windows bitsandbytes wheel Unsloth Studio already installs (libbitsandbytes_rocm715.dll) runs NF4 and 8-bit AdamW correctly on gfx1010 under the ROCm 10.2 torch: Qwen3.5-0.8B QLoRA 0.0463648662 0.0463648662 0.0361770093, Qwen3-1.7B QLoRA 0.0209256057 0.0209256057 0.0192451496, matching the RX 6500 XT. (Earlier note here said no build existed; that was true on WSL only.)

Reproduce the Triton buffer-ops problem in ten lines

import torch, triton, triton.language as tl
@triton.jit
def k(x_ptr, y_ptr, n, BLOCK: tl.constexpr):
    offs = tl.program_id(0) * BLOCK + tl.arange(0, BLOCK); m = offs < n
    tl.store(y_ptr + offs, tl.load(x_ptr + offs, mask = m) * 2, mask = m)
x = torch.arange(1024, device = "cuda", dtype = torch.float32); y = torch.full_like(x, -1)
k[(4,)](x, y, 1024, BLOCK = 256); torch.cuda.synchronize()
print((y == x * 2).sum().item(), "of 1024 correct")   # gfx1010: 0. with AMDGCN_USE_BUFFER_OPS=0: 1024

The generated ISA uses buffer_load_dwordx4 / buffer_store_dwordx4; gfx10.1 reads the buffer resource descriptor differently from gfx10.3, and the accesses go nowhere.

Activity

  1. LeoBorcherding commented on Sep 24, 2026

    @LeoBorcherding
    CollaboratorAuthor

    status: the whole chain now exists. #11615 merged, unslothai/unsloth-zoo#1316 and unslothai/unsloth-zoo#1356 open, installer #11755 draft. with all four an RX 5700 XT installs and trains lora and qlora on windows out of the box, verified from a fresh install and inside the desktop app. linux untouched, needs a bare-metal tester. details and screenshots in the PR bodies.

  2. changed the title [-]AMD: training on RDNA1 (RX 5700 XT, gfx1010)[/-] [+][Tracking] AMD: training on RDNA 1 cards (RX 5700 XT, gfx1010)[/+] on Sep 25, 2026
  3. LeoBorcherding commented on Oct 6, 2026

    @LeoBorcherding
    CollaboratorAuthor

    Closing: everything this issue tracked for Windows is merged, and an RX 5700 XT installs Unsloth Studio and trains LoRA and QLoRA out of the box.

    Not covered here, and not closed by this:

    • Linux on bare metal is untested. WSL2 is blocked below Unsloth by the driver's GPU VA reservation (dxgkio_reserve_gpu_va: EOVERFLOW). If someone has an RX 5000 card in a Linux box and it fails, that's a new issue.
    • The gemma-3-270m compiled-path nondeterminism on RDNA1 and the Triton gfx1010 bugs (silent buffer ops, FDOT2 abort) still need their own reports. They were "to follow" above and haven't been filed yet.
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