Skip to content
View walefsouza's full-sized avatar
  • UEFS
  • FSA-BA

Block or report walefsouza

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don't include any personal information such as legal names or email addresses. Markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. Projetos-introdutorios-em-Python Projetos-introdutorios-em-Python Public

    Python

  2. FPGA-ULA-de-8-bits-modelo-RPN FPGA-ULA-de-8-bits-modelo-RPN Public

    Verilog

  3. Projeto-Vinho-VASF Projeto-Vinho-VASF Public

    Controlador digital para automação de linha de envase (VINHOVASF) implementado em FPGA DE10-Lite usando Verilog. Projeto baseado em Máquinas de Estados Finitos (Moore/Mealy) e controle distribuído.…

    Verilog