PicoRV32 - A Size-Optimized RISC-V CPU

Deprecated, please go to next generation Ultra-Low Power RISC-V Core https://github.com/riscv-mcu/e203_hbirdv2

A small, light weight, RISC CPU soft core

3-stage RV32IMACZb* processor with debug

一步一步写MIPS CPU

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

MIPS CPU implemented in Verilog

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)

奋战一学期，造台计算机（编译出的bit文件在release中，可以直接食用）

A Reconfigurable RISC-V Core for Approximate Computing

A simple RISC-V core written in Chisel.