Skip to content
View yash-jangra's full-sized avatar
  • Delhi
  • 16:36 (UTC +05:30)

Block or report yash-jangra

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
yash-jangra/README.md

Popular repositories Loading

  1. Team-Razor-Crest Team-Razor-Crest Public

    Solution submission for Round-1 of the Tryst Autobot Challenge

    Jupyter Notebook 1

  2. -A-32-bit-5-stage-Pipelined-MIPS-based-RISC-Core-based-on-Harvard-Architecture- -A-32-bit-5-stage-Pipelined-MIPS-based-RISC-Core-based-on-Harvard-Architecture- Public

    Forked from Mostafa-Hassanien/-A-32-bit-5-stage-Pipelined-MIPS-based-RISC-Core-based-on-Harvard-Architecture-

    This project aims to implement a 32-bit 5-stage pipelined High-performance MIPS-based RISC Core based on Harvard Architecture. The MIPS processor was designed using MIPS ISA (Instruction Set Archit…

    Verilog 1

  3. 8bit_synchronous_fifo_design 8bit_synchronous_fifo_design Public

    Verilog implementation of an 8-bit Synchronous FIFO (First-In-First-Out) memory module

    Verilog 1 2

  4. yash-jangra yash-jangra Public

    Config files for my GitHub profile.

    C++

  5. Hacktoberfest Hacktoberfest Public

    This repo is my personal project for showcasing my photographs that I click and edit.

  6. Student_dEV Student_dEV Public

    Forked from Shrey19702/Student_dEV

    C++