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Space CACD

C 11 3 Updated Oct 16, 2019

A schematic editor for VLSI/Asic/Analog custom designs, netlist backends for VHDL, Spice and Verilog. The tool is focused on hierarchy and parametric designs, to maximize circuit reuse.

C 471 43 Updated Jun 9, 2026

Learning to do things with the Skywater 130nm process

97 13 Updated Oct 21, 2020

Guides and templates for using open source RF design tools with the SkyWater SKY130 process.

MATLAB 19 2 Updated Nov 13, 2020

Export Qucs RF schematics to KiCad layouts & OpenEMS scripts

C++ 164 16 Updated Aug 24, 2025

The repository with my simple Z-turn examples, to be used as templates for more serious project

VHDL 18 6 Updated Apr 20, 2026

Top level system definition of the satellite design

HTML 5 1 Updated Jul 26, 2020

Builds, flow and designs for the alpha release

Verilog 54 17 Updated Dec 18, 2019